TM 5-6675-323-14
Table 3-6. PROCESSING CIRCUITS FUNCTIONAL SEQUENCE OPERATION - Cont
Clock
Operation of Circuit
Period
READ OPERATION - Cont
t6 t h r u
t9
s e t t i n g STM, synchronize (SYNC), and synchronous memory complete
(SMC) to low.
RAM and ROM on PCA A4
R e g i s t e r s on I/O interface PCA A5
Registers on HP-IB PCA A2
Self-test registers on PCA A3
I n t e r r u p t registers on PCA A3
NOTE
Process of reading data and instructions from any of these locations is
However, register
accomplished in a similar manner as described above.
decoder circuits must be utilized to determine appropriate register to
activate.
First five data bits (IDA -4) are decoded by register
decoder circuits and activated register accepts instruction or data
placed on data bus by microprocessor.
(3) Self-test.
Is initiated by a
self-test flag on PCA A3 (flag II), which
PCA
A3 then performs self-test steps according
originates at self-test switch S7.
t o a program stored in ROM.
Test results
are displayed on self-test lamps when the
m i c r o p r o c e s s o r initiates a WRITE 13 (W13)
and places the light sequence on the data
bus.
If test selector 6 is selected to the on (2) position, an inhibit signal is gener-
ated which initiates the bidirectional interface buses (BIB's) and isolates the
Inhibit also sets U13 which places a preset
microprocessor from the data bus.
address onto the microprocessor data bus.
3-25