TM 5-6675-323-14
(2) The microprocessor uses a single level of interrupt to update the inter-
polator section. This interrupt request is synchronized to the microprocessor
instruction fetch cycle by the latch U60B, gate U31A, and latch U28B.
u . S e l f - t e s t c i r c u i t r y . The built-in self-test provides a means of locating a
d e f e c t i v e s t a g e o r c o m p o n e n t a n d i s a n a i d i n p e r f o r m i n g c e r t a i n a l i n e m e n t s . The
c i r c u i t r y consists of the CONTINUE switch S3, the self-test switch S4-2, RESET
s w i t c h S5, U68, and the self test LEDs.
v. Register decoders.
Register selection is determined by the data bits A0-A4
and the states of the register access line (RAL), synchronous memory complete (SMC),
e x t e n d e d synchronous memory complete (XSMC), and read lines from the microprocessor,
The functions of the register lines are listed in Table 3-15.
3-127
