TM 5-6675-320-14
Table 4-5. PCA A2 TALK HANDSHAKE MODE OPERATION - Cont
Sequence
Step
Circuit and Signal Operation
4
5
6
7
8
9
10
11
12
13
14
15
16
INITIATION - Cont
Talk flip-flop U18A receives input from my address and is clocked
from decoded bits 6 and 7.
This sets U18A which generates talk
(TLK) true signal.
U27, set by TLK true signal,
is sent false and generates data
enable (DEN) which is sent to interface bus transceiver (IBT).
U26 and U15 receive DEN from U27 and sets U17B to generate a THS
true to U33.
U9 transmits new byte available (NBA) from microprocessor on PCA A3
to U26.
U26 receives inputs NBA true, serial poll mode select (SPMS) false
and THS true.
Provides true output to U25.
U8 receives ready for data (RFD) from computer and transmits RFD
true to U25.
U25 receives RFD true, data enable (DEN) true, and new byte avail-
able/serial poll mode select (NBA/SPMS) true from U26. U25
latches, generating data available (DAV) true.
U26 is enabled by SPMS false and DEN true signals and sends serial
poll mode active state (SPAS) false signal to enable latches U2 and
U14.
U2 and U14 are enabled by a SPAS false signal and transmits a data
byte from microprocessor on PCA A3 via data selectors U1 and U9 to
interface bus transceivers (IBT’s) U33 and U7. Write interface bus
(WRIB) true signal,
from microprocessor, gates data byte through U1
and U9.
U33 and U7 are enabled by DEN signal from U27 and transmit data
byte received from U2 and U14 to computer.
U25, after data byte had been accepted by computer, generates data
accepted (DAC) true signal.
DAC true signal resets U25 via IBT U8.
U15 receives reset input from U17B and U25 and sets talk handshake
(THS) to false.
Microprocessor on PCA A3 senses talk handshake (THS) false and sets
new byte available (NBA) false signal.
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