TM 5-6675-316-14
(4) One final input to the comparators is DISABLE for board disable function.
The board can be enabled only for the proper addresses, provided DISABLE is high.
When WRT is low, R/W goes low if the board is enabled to write into memory. Chip
Enable (CEO through CE7) on the RAM prevents the common R/W signal from writing into
more than the lK selected. The bus transceivers (A2 and A3) output RAM data to the
CPU bus when BDE is present. When FCH is low and BOARD ENABLE is high, BDE is
high.
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