ARMY TM 5-6675-238-14
MARINE CORPS TM 08839A-14/1
Table 6-2. SPU Serial Address Word and Data Word Bit Usage
Mode control
Data in the data
Functional
Address bits
bits in
word which follows
segment
Maj T/R DTR Sub
address word
address word
C o m m e n t s
SPU sends back to After sending this address
NA
Bits 3 thru 14
are used in
various pat-
terns. Bit
15 must be
a l
computer exactly
what was in the
address
word to SPU, the compu-
ter is required to input
one word from SPU when
the data envelope is
present
IMU discretes 100 0
loop closer
D/S and D/R
100
0
converter
loop closer
D/DC converter 100 0
loop closer
Parity status
100
1
word
1
0
0
1
0010 0010 to 0111
0011 0001 to 0101
0100 NA
0101 NA
NA
14 most significant
bits are to be
used. Also check
parity
14 most significant
bits are to be
used. Also check
parity. Bit 15
is 1 or 0 as
desired
The 8 most signifi-
cant bits are to
be used for par-
ity status as
required
After sending each address
word the computer reads
its input discrete word
(this is a parallel data
word which receives
status data from the
input discrete lines). A
total message consists
of the computer sending
four address words and
accompanying discrete
output data. The com-
puter then reads the
corresponding four
groups of parallel
discrete input data
After sending each address
word, the computer sends
one data word. The com-
puter must also read the
appropriate IMU roll,
pitch, and heading lines
which correspond to the
address and data word
that was sent
After sending each address
word, the computer sends
one data word. The com-
puter must then read-in
the analog parameter
which corresponds to the
address and data word
that was sent
After sending the address
word, the computer will
read the parity status
data word. This will be
done periodically. Each
functional segment will
enter its status bit in
a specific bit location
in the data word
6-5
