TM 5-6675-323-14
V o l t a g e b a l a n c e c i r c u i t . T h e X- and Y-plotter motors form inductive loads
am.
across the 34 volt supplies. With the switching action of the motor drivers, it is
possible to generate counter-induced voltages which would drive one or the other of
the 34 volt supplies to a high level. To prevent the possibility of this happening,
a balance circuit has been provided for the 34 volt supplies. Any imbalance
created by the counter-induced voltages is sensed at the junction of resistors R66
and R74 in the balance circuit. With a balanced condition, this point is maintained
at zero volts.
(1) Any voltage at the tie point is sensed at the inverting input of the
+34 volts high, during the negative half-cycle output from U5, transistor Q27 will
be conducting. This turns on transistor Q18, which in turn gates the FET Q20 on,
d r a w i n g c u r r e n t f r o m t h e + 3 4 v o l t s u p p l y . T h e FET Q20 will pump current into
inductor L3. During the positive half-cycle out of U5, transistors Q26 and Q21 will
b e turned on, gating the FET Q22 on.
The current established in L3 continues to
flow during this half-cycle through FET Q22, acting as a diode, in a direction
opposite the normal flow. This current charges the -34 volt supply, and this
action, combined with the loading of the +34 volt supply, brings the two supplies
into balance. When the supplies are in balance, a n u l l w i l l a g a i n e x i s t a t t h e t i e
point of the resistors R66 and R74.
(2) The comparator U4 and its associated components acts as a safety system
by sensing the average current through the inductor L3 and the resistor R61. If
t h i s current tries to exceed 3 amps, Q24 and Q25 feed back a signal to limit the
current at 3 amps to prevent circuit damage.
(3) During power-up or reset, the balance circuit is disabled by transistor
Q28. This disabling action prevents any attempt at a balancing action before all
voltages have had time to stabilize.
an. Positive 5 volt switching supply.
regulated +5 volts from the unregulated +34 volt supply. The +34 volts is applied
W h e n the FET is conducting, a ramp of current is developed in the
to the FET Q15.
inductor L2, which charges the capacitor C15 to the output voltage of +5 volts. The
20 kHz oscillator output is integrated, and the sawtooth is applied to the compara-
tor along with the 5 volt reference from the reference supply, and the +5 volt
s e n s e , which is the +5 volt output from the power supply. The output of U3 switches
If the +5 volt sense
according to the relationship between the two 5 volt levels.
is low, the on time of the FET Q15 will increase, increasing the current flow in L2,
thus increasing the charge on C15.
If the +5 volt sense is high in comparison with
t h e reference, the on time of Q15 will be reduced, allowing the charge on C15 to
bleed down to the proper level.
ao.
Positive 12 volt switching supply. The functioning of the +12 volt switching
supply is essentially identical to that of the +5 volt switching supply. The
This
resistors R14 and R16 at the non-inverting input of U3 form a voltage divider.
divider drops the feedback voltage from the +12 volt output of the supply allowing
the use of the +5 volt reference voltage as the reference in this supply as it is in
the 5 volt switching supply.
ap.
Negative 12 volt supply. The -12 volt supply is a low current, Zener-
r e g u l a t e d e m i t t e r - f o l l o w e r c i r c u i t . The thyristor Q32 has been included for circuit
overload protection.
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