TM 5-6675-318-14
Table 3-5. PCA A2 TALK HANDSHAKE MODE OPERATION - Cont
Sequence
Circuit and Signal Operation
Step
INITIATION - Cont
4
T a l k flip-flop U18A receives input from my address and is clocked
T h i s sets U18A which generates talk
f r o m decoded bits 6 and 7.
(TLK) true signal.
U 2 7 , s e t b y T L K t r u e s i g n a l , i s sent false and generates data
5
enable (DEN) which is sent to interface bus transceiver (IBT).
6
U26 and U15 receive DEN from U27 and sets U17B to generate a THS
true to U33.
U 9 transmits new byte available (NBA) from microprocessor on PCA A3
7
to U26.
8
U 2 6 r e c e i v e s i n p u t s N B A t r u e , s e r i a l poll mode select (SPMS) false
and THS true.
Provides true output to U25.
9
U 8 receives ready for data (RFD) from computer and transmits RFD
true to U25.
U 2 5 receives RFD true, data enable (DEN) true, and new byte avail-
10
U25
a b l e / s e r i a l poll mode select (NBA/SPMS) true from U26.
latches, generating data available (DAV) true.
U 2 6 is enabled by SPMS false and DEN true signals and sends serial
11
p o l l mode active state (SPAS) false signal to enable latches U2 and
U14.
U 2 and U14 are enabled by a SPAS false signal and transmits a data
12
b y t e from microprocessor on PCA A3 via data selectors U1 and U9 to
interface bus transceivers (IBT's) U33 and U7. Write interface bus
( W R I B ) t r u e s i g n a l , f r o m microprocessor, gates data byte through U1
and U9.
U 3 3 and U7 are enabled by DEN signal from U27 and transmit data
13
b y t e received from U2 and U14 to computer.
U 2 5 , after data byte had been accepted by computer, generates data
14
a c c e p t e d ( D A C ) t r u e s i g n a l . D A C true signal resets U25 via IBT U8.
U 1 5 receives reset input from U17B and U25 and sets talk handshake
15
(THS) to false.
M i c r o p r o c e s s o r on PCA A3 senses talk handshake (THS) false and sets
16
new byte available (NBA) false signal.
3-20
